As shown in FIG. 1, a multi-channel regulator system includes a plurality of common input channels 10 for converting an input voltage Vin into a plurality of output voltages Vo1-VoN, respectively. Each channel 10 includes a pulse width modulation (PWM) integrated circuit (IC) 12 and a power stage 14, in which the PWM IC 12 generates a pulse width modulation signal pwm responsive to a synchronous clock to drive the power stage 14 to convert the voltage Vin. Since the pulse width modulation signals pwm of all the channels 10 are triggered by the same synchronous clock, all the channels 10 will simultaneously draw current from the common input power supply Vin at the moment of switching all the pulse width modulation signals pwm on, and cause greater ripples in the input voltage Vin. Although increasing the decoupling capacitor Cde will help decrease the ripples in the input voltage Vin, such increase also increases the circuit size and costs, and degrades the transient response.
Another approach to improve the ripples in the input voltage Vin is based on interleaved synchronous clocks. There have been many arts proposed for phase interleaving clock synchronization, most using a master channel to provide a plurality of synchronous but phase interleaved clocks for the slave channels, for example U.S. Pat. No. 7,259,687 and TI's Product No. TPS40180. However, each existing solution for phase interleaving clock synchronization has a fixed master/slave configuration once the master channel and the slave channels are set. Since the master/slave configuration cannot be rearranged, the system is lack of flexibility. Moreover, the master channel must always keep enabled, and the phase delay for clocks it provides for the slave channels is fixed after each setting, so that the number of the slave channels cannot be increased or decreased arbitrarily. In other words, the amount of the channels for a multi-channel regulator system cannot be increased or decreased arbitrarily.
Therefore, it is desired a method for a multi-channel phase interleaved regulator system capable of enabling and disabling each channel on the fly and automatically rearranging the master/slave configuration.